[HVM][SVM] Updated the SVM V_TPR register on MMIO writes to the VLAPIC TPR

[HVM][SVM] Updated the SVM V_TPR register on MMIO writes to the VLAPIC TPR

The SVM architecture includes a virtual TPR register.  This patch
updates this register on MMIO writes to the HVM Virtual APIC.

VT does not have this register as far as I know so a stub is added in
the VT code.

Signed-off-by: Travis Betak <travis.betak@amd.com>